1. Field of the Invention
This invention relates to data processing.
2. Description Of the Prior Art
A large data processing apparatus (e.g. a digital signal processing (DSP) apparatus) typically comprises a number of data handling nodes connected to a common computer bus. The data handling nodes may comprise processors, read only memories (ROMs), random access memories (RAMs), or mass data storage devices such as disc or tape drives. Alternatively, in a distributed data processing apparatus each data handling node may itself be a processor with a dedicated memory.
In order that the data handling nodes can communicate with one another via the common bus, a bus arbitration system is required to allocate control of the bus between the various nodes. Bus arbitration can be implemented in several ways. One previously proposed arrangement comprises a central bus scheduler which receives and queues requests for bus control from data handling nodes referred to as "bus masters". So-called "bus slave" nodes can be addressed via the bus by bus master nodes, but cannot themselves request (or take) control of the bus.
When a request for bus control from a particular bus master node reaches the head of the queue, the bus scheduler grants temporary control of the bus to that node, which then performs (via the bus) a data transfer operation involving another of the data handling nodes (a bus slave node). For example, a bus master node may initiate an operation to read data from a bus slave node by first requesting control of the bus. When control of the bus is granted by the bus scheduler, the bus master node sends a data request to the bus slave node, specifying a particular memory address to be read. The bus slave node accesses that memory address, reads the requested data item and transmits that data item to the bus master node. Finally, the bus master node releases the bus for allocation to another bus master node. Throughout the data transfer operation, control of the data bus is retained by the bus master node. Only when control of the bus has been voluntarily relinquished by the bus master node (i.e. at the end of the data transfer operation) can the bus scheduler grant control of the bus to the next bus master node in the queue.